Hi guys. Here`s the thing. I own P4 775 3,0 GHz cpu and am planning to upgrade to new Dual Core E6300 2,8 GHz.
Now my question is: Will it show any performance increase, mostly in fps? I wouldn`t like to buy new cpu and not see
any difference in performance, especially fps.
My specs are:
MBO: ASROCK 4COREDUAL-VSTA ( found bios that will support dual core E6300 )
CPU: P4 3,0 GHz
VGA: GYGABITE HD4670 1GB
RAM: 2GB DDR2
PSU: LC POWER 600W
OS: Win XP SP3
This is a short explanation I saved from a previous post on the subject of multi-cores. Hope it is of some help. It's not mine, but from a fellow member.
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This is the way the ProcessAffinityMask value works in IL2.
Actually, using the ProcessAffinityMask and the num bers 1 thru 15, yes that's 15 seperate times, I discovered that IL2-46 modded to 4.09b1m would use what ever number was specified in the conf.ini. Here's how I did it. I ran it in window mode and using AMD's power monitor and task manager I can tell the game to use nearly any combination of cpus.
If ProcessAffinityMask=
;1=core #1,
;2=core #2,
;3=core's 1 & 2
;4=core #3,
;5=core's 1 & 3
;6=core's 2 & 3
;7=ALL core's
;8=core #4,
;9=core's #1 3 & 4
;10=core's 2, 3 & 4
;11= core's #1, 2 & 4
;12=core's 3 & 4,
;14= core's 2, 3, &4
;15 or 0=ALL 4 core's
If it is commented out the OS will decide which cores to use. ie All cores.
"IL-2 is not a ,ultithread application." True
IL-2 only uses 1 core" False.
so PAF....
=1 - core 0
=2 - core 1
=3 - core 0+1
=4 - core 2
=5 - core 0+2
=6 - core 1+2
=7 - core 0+1+2
commented out - all cores
If a core is enabled, it does NOT mean that core will be performing 100% while the other cores that are not enabled do nothing.
The enabled core needs an active thread to perform,
The disabled cores will be assigned tasks by the OS if needed.
There is only one way to switch off cores - the power switch - meaning all or nothing lol.
There was an long thread at SimHQ some time back exploring this(end 2005/beginning of 2006).
a '1' bit will enable the core, a '0' bit disables it.
Actual activity of cores can be checked through TaskManager. Keep in mind in general Windows OS runs hundreds of threads at the same time IL-2 runs.
A substantial part of IL-2 is written in Java which can use in excess of 100 threads. (source: Sun Microsystems) Shift-Tab opens the Java console in-game Yep that's where all those white messages come from.
Bitmask: 00000000000000000000000000000000 = Decimal 0
Processor affinity is off, and the load is distributed across all available processors.
Bitmask: 00000000000000000000000000000001 = Decimal 1
Processor 1 selected. The process will only run on processor 1.
Bitmask: 00000000000000000000000000000010 = Decimal 2
Processor 2 selected. The process will only run on processor 2.
Bitmask: 00000000000000000000000000000011 = Decimal 3
Processors 1 & 2 selected. The load is distributed across both processors, effectively the same as setting 0 above for Dual cores.
Because 0 puts the load across all processors and 3 puts the load on processor 1 and 2, they are essentially the same thing for Dual core CPUs.
For Quad core CPUs you can use more values:
Bitmask: 00000000000000000000000000000100 = Decimal 4
Processor 3 selected. The process will only run on processor 3.
Bitmask: 00000000000000000000000000001000 = Decimal 8
Processor 4 selected. The process will only run on processor 4.
And any combo between 0 and 15, for example:
Bitmask: 00000000000000000000000000000101 = Decimal 5
Processor 1 and 3 selected. The load is distributed across processor 1 and 3.
Bitmask: 00000000000000000000000000001111 = Decimal 15
Processor 1, 2, 3, and 4 selected. The load is distributed across all processors, 1, 2, 3, and 4.
Get the picture?
I edited the title of the thread, no all caps titles please.
Your motherboard does not support the Pentium Dual Core E6300 @ 2.8. But it will support the C2D E6300 which is at 1.86Ggz. I do think the performance will increase because Core architecture is must more efficient than Netburst. I would not suggest on upgrading because you are already on a dead-end platform.